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MSDOS - Interrupt List 00h-0Fh

The use of → instead of = signifies that the indicated register or register pair contains a pointer to the specified item, rather than the item itself. One or more letters may follow the interrupt number; they have the following meanings:

  • U - undocumented function,
  • u - partially documented function,
  • P - available only in protected mode,
  • R - available only in real or V86 mode

INT 00

CPU-generated - DIVIDE ERROR

generated if the divisor of a DIV or IDIV instruction is zero or the quotient overflows the result register; DX and AX will be unchanged.

  • on an 8086/8088, the return address points to the following instruction
  • on an 80286+, the return address points to the divide instruction

SeeAlso: INT 04

INT 01

CPU-generated - SINGLE STEP

generated after each instruction if TF (trap flag) is set; TF is cleared on invoking the single-step interrupt handler interrupts are prioritized such that external interrupts are invoked after the INT 01 pushes CS:IP/FLAGS and clears TF, but before the first instruction of the handler executes used by debuggers for single-instruction execution tracing, such as MSDOS DEBUG's T command

SeeAlso: INT 03

CPU-generated (80386+) - DEBUGGING EXCEPTIONS

Instruction address breakpoint fault - will return to execute instruction Data address breakpoint trap - will return to following instruction General detect fault, debug registers in use Task-switch breakpoint trap

SeeAlso: INT 03

INT 02

external hardware - NON-MASKABLE INTERRUPT

generated by the CPU when the input to the NMI pin is asserted return address points to start of interrupted instruction on 80286+ although the Intel documentation states that this interrupt is typically used for power-failure procedures, it has many other uses on IBM-compatible machines:

  • Memory parity error: all except Jr, CONV, and some machines without memory parity
  • Breakout switch on hardware debuggers
  • Coprocessor interrupt: all except Jr and CONV
  • Keyboard interrupt: Jr, CONV
  • I/O channel check: CONV, PS50+
  • Disk-controller power-on request: CONV
  • System suspend: CONV
  • Real-time clock: CONV
  • System watch-dog timer, time-out interrupt: PS50+
  • DMA timer time-out interrupt: PS50+
  • Low battery: HP 95LX
  • Module pulled: HP 95LX

INT 03

CPU-generated - BREAKPOINT

generated by the one-byte breakpoint instruction (opcode CCh) used by debuggers to implement breakpoints, such as MSDOS DEBUG's G command also used by Turbo Pascal versions 1,2,3 when {$U+} specified return address points to byte following the breakpoint instruction

SeeAlso: INT 01


	AH = 09h
	SI = 4647h ('FG')
	DI = 4A4Dh ('JM')
	AL = function
	    10h display string in Soft-ICE window
		DS:DX -> ASCIZ string to display (max 100 bytes, 0Dh OK)
	    11h execute Soft-ICE command
		DS:DX -> ASCIZ command string (max 100 bytes, 0Dh OK)
	    12h get breakpoint information
		Return:	BH = entry number of last breakpoint set
			BL = type of last breakpoint set
			    00h BPM (breakpoint register types)
			    01h I/O
			    02h INTerrupt
			    03h BPX (INT 03h-style breakpoint)
			    04h reserved
			    05h range
			DH = entry number of last breakpoint to be triggered
			DL = type of last triggered breakpoint (see above)

INT 04


the INTO instruction will generate this interrupt if OF (Overflow Flag) is set; otherwise, INTO is effectively a NOP may be used for convenient overflow testing (to prevent errors from propagating) instead of JO or a JNO/JMP combination

SeeAlso: INT 00

INT 05

normally invoked by the INT 09 handler when PrtSc key is pressed, but may be invoked directly by applications

byte at 0050h:0000h contains status used by default handler 00h not active
  01h PrtSc in progress
  FFh last PrtSc encountered error
 default handler is at F000h:FF54h in IBM PC and 100%-compatible BIOSes

SeeAlso: INT 10/AH=12h/BL=20h

CPU-generated (80186+) - BOUND RANGE EXCEEDED

generated by BOUND instruction when the value to be tested is less than the indicated lower bound or greater than the indicated upper bound.

returning from this interrupt re-executes the failing BOUND instruction

INT 06

CPU-generated (80286+) - INVALID OPCODE

generated when the CPU attempts to execute an invalid opcode (most protected-mode instructions are considered invalid in real mode)

generated on BOUND, LDS, LES, or LIDT instructions which specify a register rather than a memory address return address points to beginning of invalid instruction with proper programming, this interrupt may be used to emulate instructions which do not exist; many 386 BIOSes emulate the 80286

undocumented LOADALL instruction which was removed from the 80386+

SeeAlso: INT 0C“CPU”,INT 0D“CPU”


called just before going into light or deep (shutdown) sleep and just after returning from light or deep sleep

SeeAlso: INT 0B“HP 95LX”,INT 15/AX=4DD4h,INT 15/AH=4Eh

INT 07


automatically called if a coprocessor instruction is encountered when no coprocessor is installed can be used to emulate a numeric coprocessor in software


INT 08


generated 18.2 times per second by channel 0 of the 8254 system timer, this interrupt is used to keep the time-of-day clock updated programs which need to be invoked regularly should use INT 1C unless they need to reprogram the timer while still keeping the time-of-day clock running at the proper rate

default handler is at F000h:FEA5h in IBM PC and 100%-compatible BIOSes may be masked by setting bit 0 on I/O port 21h

SeeAlso: INT 1C,INT 4A,INT 50“DESQview”,INT 58“DoubleDOS”,INT 70,INT 78“GO32”

INT 08 - CPU-generated (80286+) - DOUBLE EXCEPTION DETECTED

called when multiple exceptions occur on one instruction, or an exception occurs in an exception handler called in protected mode if an interrupt above the defined limit of the interrupt vector table occurs

return address points at beginning of instruction with errors or the beginning of the instruction which was about to execute when the external interrupt caused the exception

if an exception occurs in the double fault handler, the CPU goes into SHUTDOWN mode (which circuitry in the PC/AT converts to a reset);

this “triple fault” is a faster way of returning to real mode on many 80286 machines than the standard keyboard controller reset

INT 09


generated when data is received from the keyboard. This is normally a scan code (from either a keypress *or* a key release), but may also be an ACK or NAK of a command on AT-class keyboards.

may be masked by setting bit 1 on I/O port 21h if the BIOS supports an enhanced (101/102-key) keyboard, it calls INT 15/AH=4Fh after reading the scan code from the keyboard and before further processing the interrupt handler performs the following actions for certain special keystrokes:

  • Ctrl-Break clear keyboard buffer, place word 0000h in buffer, invoke INT 1B, and set flag at 0040h:0071h
  • SysRq invoke INT 15/AH=85h
  • Ctrl-Numlock place system in a tight wait loop until next INT 09
  • Ctrl-Alt-Del jump to BIOS startup code (either F000h:FFF0h or the destination of the jump at that address)
  • Shift-PrtSc invoke INT 05

SeeAlso: INT 05,INT 0B“HP 95LX”,INT 15/AH=4Fh,INT 15/AH=85h,INT 16,INT 1B

SeeAlso: INT 2F/AX=A901h,INT 51“DESQview”,INT 59“DoubleDOS”,INT 79“GO32”


called if the coprocessor attempts to access memory outside a segment boundary; it may occur at an arbitrary time after the coprocessor instruction was issued until the condition is cleared or the coprocessor is reset, the only coprocessor instruction which may be used is FNINIT; WAIT or other coprocessor instructions will cause a deadlock because the coprocessor is still busy waiting for data

SeeAlso: INT 07“CPU”

INT 09 P - internal hardware - RESERVED BY Intel (80486)

this exception has been moved to INT 0D

SeeAlso: INT 09“MATH”,INT 0D



the TOPS and PCnet adapters use this interrupt request line by default DOS 3.2 revectors IRQ2 to a stack-switching routine on ATs and above, the physical data line for IRQ2 is labeled IRQ9 and connects to the slave 8259. The BIOS redirects the interrupt for IRQ9 back here.

under DESQview, only the INT 15h vector and BASIC segment address (the word at 0000h:0510h) may be assumed to be valid for the handler's process many VGA boards do not implement the vertical retrace interrupt, including the IBM VGA Adapter where the traces are either cut or removed

SeeAlso: INT 52“DESQview”,INT 5A“DoubleDOS”,INT 71,INT 7A“GO32”

IRQ2 - Tandy 1000-series HARD DISK

may be masked by setting bit 2 on I/O port 21h

SeeAlso: INT 52“DESQview”,INT 5A“DoubleDOS”,INT 71


newer Roland cards and MIDI interfaces by other manufacturers use a jumper-selectable IRQ, but software and hardware generally defaults to IRQ2

SeeAlso: INT 52“DESQview”,INT 5A“DoubleDOS”,INT 71,INT 7A“GO32”

P - CPU-generated (80286+) - INVALID TASK STATE SEGMENT

automatically called during a task switch if the new TSS specified by the task gate is invalid for any of the following reasons:

  • TSS limit is less than 43 (80286) or 103 (80386/80486)
  • LDT selector invalid or segment not present
  • null SS selector, or SS selector outside LDT/GDT limit
  • stack segment is read-only
  • stack segment DPL differs from new CPL, or RPL <> CPL
  • CS selector is outside LDT/GDT limit or not code
  • non-conforming code segment's DPL differs from CPL
  • conforming code segment's DPL > CPL
  • DS/ES selectors outside LDT/GDT limit or not readable segments

the handler must use a task gate in order to have a valid TSS under which to execute; it must also reset the busy bit in the new TSS

SeeAlso: INT 0B“CPU”



the TOPS and PCnet adapters use this interrupt request line as an alternate on PS/2's, COM2 through COM8 share this interrupt; on many PC's, COM4 shares this interrupt

may be masked by setting bit 3 on I/O port 21h

SeeAlso: INT 0C“COM1”,INT 53“DESQview”,INT 5B“DoubleDOS”,INT 7B“GO32”

P - CPU-generated (80286+) - SEGMENT NOT PRESENT

generated when loading a segment register if the segment descriptor indicates that the segment is not currently in memory, unless the segment is an LDT (see INT 0A“CPU”) or stack segment (see INT 0C“CPU”) needed by a task switch may be used to implement virtual memory by loading in segments as they are accessed, clearing the “not present” bit after loading

SeeAlso: INT 0A“CPU”,INT 0E“hardware”


debounces key, places the keycode in I/O register 60h, and calls INT 09

SeeAlso: INT 09,INT 0D“HP 95LX”,INT 15/AX=4DD4h



on many PC's, COM3 shares this interrupt may be masked by setting bit 4 on I/O port 21h

SeeAlso: INT 0B“COM2”,INT 54“DESQview”,INT 5C“DoubleDOS”,INT 7C“GO32”

CPU-generated (80286+) - STACK FAULT

  • generated on stack overflow/underflow in protected mode
  • generated in protected mode if an inter-level transition or task switch references a stack segment marked “not present”
  • generated on accessing a word operand at SS:FFFFh in real mode
    • the 80286 will shut down in real mode if SP=1 before a push. On the PC AT and compatibles, external circuitry generates a reset on shutdown.

SeeAlso: INT 0B“CPU”,INT 0D“CPU”


   Call offset 100h in the interrupt handler's segment with
	AH = function
	    03h update screen
	    05h select next session
		AL = session number (00h-03h)
		Return: AL = session type code
			    00h not active
			    01h display session
			    02h printer session
			    FEh invalid session number
			DS = requested session's data segment (0 if not active)
Return: ???

Format of emulator's data area (offset from interrupt handler's segment):

Offset Size Description
13Eh BYTE bit flags for status line indicators turned on since this byte last zerod
13Fh BYTE bit flags for status line indicators turned off since this byte last set to FFh
140h WORD offset of EBCDIC to ASCII translation
146h WORD offset of EBCDIC screen buffer
148h WORD offset of EC (engineering change) level signature
150h BYTE “KEYI”
151h BYTE 5250 key scan code to be sent to remote
15Dh BYTE 5250 cursor column
15Eh BYTE 5250 cursor row
198h BYTE “NSDS”


IRQ5 - FIXED DISK (PC,XT), LPT2 (AT), reserved (PS/2)

under DESQview, only the INT 15h vector and BASIC segment address (the word at 0000h:0510h) may be assumed to be valid for the handler's process

may be masked by setting bit 5 on I/O port 21h

SeeAlso: INT 0E“IRQ6”,INT 0F“IRQ7”,INT 55“DESQview”,INT 5D“DoubleDOS”

SeeAlso: INT 7D“GO32”

IRQ5 - Tandy 1000 60 Hz RAM REFRESH

SeeAlso: INT 55


SeeAlso: INT 0B“HP 95LX”,INT 0E“HP 95LX”,INT 15/AX=4DD4h


called in real mode when

  • an instruction accesses a word operand located at offset FFFFh in segment CS, DS, ES, FG, or GS
  • a PUSH MEM or POP MEM instruction contains an invalid bit encoding in the second byte
  • an instruction exceeds the maximum length allowed (10 bytes for 80286, 15 bytes for 80386/80486)
  • an instruction wraps from offset FFFFh to offset 0000h

called in protected mode on protection violations not covered by INT 06 through INT 0C, including

  • segment limit violations
  • write to read-only segments
  • accesses using null DS or ES selectors
  • accesses to segments with privilege greater than CPL
  • wrong descriptor type

called on 80486 protected-mode floating-point protection fault

SeeAlso: INT 09“80486”,INT 0C“STACK”



generated by floppy disk controller on completion of an operation

default handler is at F000h:EF57h in IBM PC and 100%-compatible BIOSes

may be masked by setting bit 6 on I/O port 21h

SeeAlso: INT 0D“IRQ5”,INT 56“DESQview”,INT 5E“DoubleDOS”,INT 7E“GO32”

CPU-generated (80386+ native mode) - PAGE FAULT

used to implement virtual memory

SeeAlso: INT 0B“hardware”


SeeAlso: INT 0D“HP 95LX”,INT 0F“HP 95LX”,INT 15/AX=4DD4h



generated by the LPT1 printer adapter when printer becomes ready most printer adapters do not reliably generate this interrupt the 8259 interrupt controller generates an interrupt corresponding to IRQ7 when an error condition occurs

SeeAlso: INT 0D“LPT2”,INT 57“DESQview”,INT 5F“DoubleDOS”,INT 7F“GO32”


SeeAlso: INT 0E“HP 95LX”,INT 15/AX=4DD4h,INT 70

back2root/ibm-pc-ms-dos/interrupts/old/interrupt_list-00-0f.txt · Dernière modification : 2023/01/05 04:00 de