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        <title>Nox-Rhea WiKi - back2root:ibm-pc-ms-dos:hardware</title>
        <description></description>
        <link>https://wiki.nox-rhea.org/</link>
        <lastBuildDate>Mon, 27 Apr 2026 14:41:07 +0000</lastBuildDate>
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            <title>Nox-Rhea WiKi</title>
            <link>https://wiki.nox-rhea.org/</link>
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        <item>
            <title>80x86-architecture</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/80x86-architecture?rev=1709498716&amp;do=diff</link>
            <description>Intel 80x86 Family Architecture

General purpose registers
 General Purpose Registers                                           Segment Registers                    AH/AL                                  AX    (EAX)   Accumulator    CS</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Sun, 03 Mar 2024 20:45:16 +0000</pubDate>
        </item>
        <item>
            <title>6845</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/6845?rev=1724763258&amp;do=diff</link>
            <description>6845 - Motorola CRT Controller



The Motorola 6845, or MC6845, is a display controller that was widely used in 8-bit computers during the 1980s.

Originally intended for designs based on the Motorola 6800 CPU and given a related part number, it was more widely used alongside various other processors, and was most commonly found in machines based on the Zilog Z80 and MOS 6502.</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Tue, 27 Aug 2024 12:54:18 +0000</pubDate>
        </item>
        <item>
            <title>8042-ps2</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/8042-ps2?rev=1768166260&amp;do=diff</link>
            <description>8042 - Keyboard Controller (AT,PS/2)

8042 Commands &amp; Responses - (Port 60h)

Commands System Issues to Keyboard (write port 60h)
  Command   Description</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Sun, 11 Jan 2026 21:17:40 +0000</pubDate>
        </item>
        <item>
            <title>8250</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/8250?rev=1677182113&amp;do=diff</link>
            <description>8250 - UART - Universal Asynchronous Receiver/Transmitter
  Port        Description                                                                                                   3F8h/2F8h   Transmit/Receive Buffer  (read/write)
Baud Rate Divisor LSB if bit 7 of LCR is set	(read/write)</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Thu, 23 Feb 2023 19:55:13 +0000</pubDate>
        </item>
        <item>
            <title>8253</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/8253?rev=1768170678&amp;do=diff</link>
            <description>8253/8254 PIT - Programmable Interval Timer

The Intel 8253 and 8254 are programmable interval timers (PITs), which perform timing and counting functions using three 16-bit counters.

The 825x family was primarily designed for the Intel 8080/8085-processors, but were later used in x86 compatible systems. The 825x chips, or an equivalent circuit embedded in a larger chip, are found in all IBM PC compatibles.&lt;a id=&quot;port43h&quot;&gt;&lt;/a&gt;&lt;a id=&quot;cptformat&quot;&gt;&lt;/a&gt;&lt;a id=&quot;cptmode&quot;&gt;&lt;/a&gt;&lt;a id=&quot;cptlatch&quot;&gt;&lt;/a&gt;&lt;a id=&quot;…</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Sun, 11 Jan 2026 22:31:18 +0000</pubDate>
        </item>
        <item>
            <title>8255</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/8255?rev=1768168266&amp;do=diff</link>
            <description>8255 - Programmable Peripheral Interface - PPI (PC,XT, PCjr)




The Intel 8255 (or i8255) Programmable Peripheral Interface (PPI) chip was developed and manufactured by Intel in the first half of the 1970s for the Intel 8080 microprocessor. 

The 8255 provides 24 parallel input/output lines with a variety of programmable operating modes.</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Sun, 11 Jan 2026 21:51:06 +0000</pubDate>
        </item>
        <item>
            <title>8259-pic</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/8259-pic?rev=1768166529&amp;do=diff</link>
            <description>8259 - Programmable Interrupt Controller (PIC)

Initialization Command Word 1 at Port 20h and A0h
  Bit   Initialization Command Word 1                        0     1=ICW4 is needed
 0=no ICW4 needed                 1     1=single 8259
0=cascading 8259&#039;s</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Sun, 11 Jan 2026 21:22:09 +0000</pubDate>
        </item>
        <item>
            <title>8272-pd765</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/8272-pd765?rev=1677187841&amp;do=diff</link>
            <description>8275A- NEC µPD765 - Floppy Disk Controller

8275A-µPD765 Registers

3F0h - FDC Diskette Status Register A (PS/2)
  bit   3F0h  PS/2 Disk Status Register A (read-only)    0     direction                                        1     write protect</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Thu, 23 Feb 2023 21:30:41 +0000</pubDate>
        </item>
        <item>
            <title>cpu</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/cpu?rev=1677244596&amp;do=diff</link>
            <description>CPU Characteristics / Determination
 8088,80188,V20                  six byte prefetch queue, allows use of self modifying code to determine length of prefetch                                                 8086,80186,V30                  four byte prefetch queue, allows use of self modifying code to determine length of prefetch</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Fri, 24 Feb 2023 13:16:36 +0000</pubDate>
        </item>
        <item>
            <title>ega-vga-registers</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/ega-vga-registers?rev=1771856326&amp;do=diff</link>
            <description>Les registres des cartes EGA/VGA

Les cartes EGA/VGA reposent essentiellement sur quatre contrôleurs se répartissant les tachés liées a la génération du signal vidéo. Concrètement, it s’agit :

	*  du contrôleur CRT,
	*  du contrôleur d’attributs,</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Mon, 23 Feb 2026 14:18:46 +0000</pubDate>
        </item>
        <item>
            <title>flags</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/flags?rev=1678301272&amp;do=diff</link>
            <description>FLAGS - Intel 8086 Family Flags Register

This register cannot be accessed (read/write) directly.
  Bit    Flag                                    0     CF Carry Flag                            1     1                                        2     PF Parity Flag</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Wed, 08 Mar 2023 18:47:52 +0000</pubDate>
        </item>
        <item>
            <title>instructions-timing</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/instructions-timing?rev=1677244596&amp;do=diff</link>
            <description>Instruction Timing

Instruction Clock Cycle Calculation

Some instructions require additional clock cycles due to a “Next Instruction Component” identified by a “+m” in the instruction clock cycle listings. This is due to the prefetch queue being purge on a control transfers. Below is the general rule for calculating</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Fri, 24 Feb 2023 13:16:36 +0000</pubDate>
        </item>
        <item>
            <title>irq</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/irq?rev=1768166508&amp;do=diff</link>
            <description>IRQ - int table

Intel Defined CPU Exception Table (see notes)
  Interrupt   Function                                  0           Divide by zero                            1           Single step                               2           Non-maskable  (NMI)</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Sun, 11 Jan 2026 21:21:48 +0000</pubDate>
        </item>
        <item>
            <title>start</title>
            <link>https://wiki.nox-rhea.org/back2root/ibm-pc-ms-dos/hardware/start?rev=1768167300&amp;do=diff</link>
            <description>PORTS Common I/O Port Addresses

Port addresses are not always constant across PC, AT and PS/2

Unless marked, port addresses are relative to PC and XT only

Quick Jump


	* Informations

	* 6845 - Motorola CRT Controller
	* 8042 - Keyboard Controller (AT,PS/2)
	* 8250 - UART - Universal Asynchronous Receiver/Transmitter
	* 8253/8254 PIT - Programmable Interval Timer
	* 8255 - Programmable Peripheral Interface - PPI (PC,XT, PCjr)
	* 8259 - Programmable Interrupt Controller (PIC)
	* 8275A- NEC µP…</description>
            <author>anonymous@undisclosed.example.com (Anonymous)</author>
            <pubDate>Sun, 11 Jan 2026 21:35:00 +0000</pubDate>
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