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+ | ====== Int 01h - CPU-Generated (Hardware Handler) ====== | ||
+ | ===== CPU-generated - SINGLE STEP ===== | ||
+ | |||
+ | Generated after each instruction if TF (trap flag) is set; TF is cleared on invoking the single-step interrupt handler interrupts are prioritized such that external interrupts are invoked after the INT 01 pushes CS:IP/FLAGS and clears TF, but before the first instruction of the handler executes used by debuggers for single-instruction execution tracing, such as MSDOS DEBUG' | ||
+ | |||
+ | See Also: INT 03 | ||
+ | |||
+ | ===== CPU-generated (80386+) - DEBUGGING EXCEPTIONS ===== | ||
+ | |||
+ | Instruction address breakpoint fault - will return to execute instruction Data address breakpoint trap - will return to following instruction General detect fault, debug registers in use Task-switch breakpoint trap | ||
+ | |||
+ | See Also: INT 03 | ||
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+ | [[back2root: |