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Les deux révisions précédentesRévision précédenteProchaine révision | Révision précédente | ||
back2root:ibm-pc-ms-dos:hardware:start [2023/01/22 20:16] – modification externe 127.0.0.1 | back2root:ibm-pc-ms-dos:hardware:start [2024/08/27 12:04] (Version actuelle) – [Tableau] frater | ||
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===== 020h-02Fh - 8259A Master Programmable Interrupt Controller ===== | ===== 020h-02Fh - 8259A Master Programmable Interrupt Controller ===== | ||
- | + | {{tablelayout? | |
- | | 020h | 8259 Command port (see [[back2root: | + | | 020h | [[back2root: |
- | | 021h | 8259 Interrupt mask register (see [[back2root: | + | | 021h | [[back2root: |
===== 030-03F | ===== 030-03F | ||
Ligne 59: | Ligne 59: | ||
===== 060h-06Fh - 8042 Keyboard Controller | ===== 060h-06Fh - 8042 Keyboard Controller | ||
- | + | {{tablelayout? | |
- | | 060h | [[back2root: | + | | 060h | [[back2root: |
- | | 061h | [[back2root: | + | | 061h | [[back2root: |
- | | 064h | [[back2root: | + | | 064h | [[back2root: |
===== 070h-07Fh - CMOS RAM ===== | ===== 070h-07Fh - CMOS RAM ===== | ||
Ligne 85: | Ligne 85: | ||
===== 0A0h-0BFh - Second 8259 Programmable Interrupt Controller (AT, PS/2) ===== | ===== 0A0h-0BFh - Second 8259 Programmable Interrupt Controller (AT, PS/2) ===== | ||
- | | 0A0h | NMI Mask Register (PC,XT) (write 80h to enable NMI, 00h disable) | + | {{tablelayout? |
- | | 0A0h | Second 8259 Command port (see [[back2root: | + | | 0A0h |
- | | 0A1h | Second 8259 Interrupt mask register (see [[back2root: | + | | 0A0h | [[back2root: |
+ | | 0A1h | [[back2root: | ||
Ligne 224: | Ligne 225: | ||
| 386h | On board [[back2root: | | 386h | On board [[back2root: | ||
| 387h | On board [[back2root: | | 387h | On board [[back2root: | ||
+ | |||
+ | |||
| 388h | On board 8273 | read: status\\ Write: Command | | 388h | On board 8273 | read: status\\ Write: Command | ||
| 389h | On board 8273 | write: parameter\\ read: response | | 389h | On board 8273 | write: parameter\\ read: response | ||
Ligne 242: | Ligne 245: | ||
| 3A6h | On board [[back2root: | | 3A6h | On board [[back2root: | ||
| 3A7h | On board [[back2root: | | 3A7h | On board [[back2root: | ||
+ | |||
| 3A8h | On board 8251 | data | | | 3A8h | On board 8251 | data | | ||
| 3A9h | On board 8251 | command/ | | 3A9h | On board 8251 | command/ | ||
===== 3B0h-3BFh - Monochrome Display Adapter (write only) ===== | ===== 3B0h-3BFh - Monochrome Display Adapter (write only) ===== | ||
- | | 3B0h | port address decodes to 3B4 | | + | {{tablelayout? |
- | | 3B1h | port address decodes to 3B5 | | + | | 3B0h |
- | | 3B2h | port address decodes to 3B4 | | + | | 3B1h |
- | | 3B3h | port address decodes to 3B5 | | + | | 3B2h |
- | | 3B4h | [[back2root: | + | | 3B3h |
- | | 3B5h | [[back2root: | + | | 3B4h | [[back2root: |
- | | 3B6h | port address decodes to 3B4 | | + | | 3B5h | [[back2root: |
- | | 3B7h | port address decodes to 3B5 | | + | | 3B6h |
- | | 3B8h | [[back2root: | + | | 3B7h |
- | | 3B9h | reserved for color select register on color adapter | + | | 3B8h | [[back2root: |
- | | 3BAh | status register (read only) | | + | | 3B9h |
- | | 3BBh | reserved for light pen strobe reset | | + | | 3BAh |
+ | | 3BBh | ||
===== 3BCh-3BFh - Primary Parallel Printer Adapter (see ~PARALLEL PORT~) ===== | ===== 3BCh-3BFh - Primary Parallel Printer Adapter (see ~PARALLEL PORT~) ===== | ||
Ligne 289: | Ligne 294: | ||
</ | </ | ||
- | | 3D0h | port address decodes to 3D4 | + | | 3D0h | [[back2root: |
- | | 3D1h | port address decodes to 3D5 | + | | 3D1h | [[back2root: |
- | | 3D2h | port address decodes to 3D4 | + | | 3D2h | [[back2root: |
- | | 3D3h | port address decodes to 3D5 | + | | 3D3h | [[back2root: |
- | | 3D4h | 6845 index register, selects which register [0-11h] is to be accessed through port 3D5 | | + | | 3D4h | [[back2root: |
- | | 3D5h | 6845 data register [0-11h] selected by port 3D4, registers 0C-0F may be read. If a read occurs without the adapter installed, FFh is returned. | + | | 3D5h | [[back2root: |
- | | 3D6h | port address decodes to 3D4 | + | | 3D6h | [[back2root: |
- | | 3D7h | port address decodes to 3D5 | + | | 3D7h | [[back2root: |
- | | 3D8h | 6845 Mode control register (CGA, EGA, VGA, except PCjr) | + | | 3D8h | [[back2root: |
- | | 3D9h | color select palette register (CGA, EGA, VGA, see [[back2root: | + | | 3D9h | [[back2root: |
- | | 3DAh | status register (read only, see [[back2root: | + | | 3DAh | [[back2root: |
- | | 3DBh | Clear light pen latch (any write) | + | | 3DBh | [[back2root: |
- | | 3DCh | Preset Light pen latch | | + | | 3DCh | [[back2root: |
- | | 3DFh | CRT/CPU page register (PCjr only) | + | | 3DFh | [[back2root: |
===== 3E8h-3EFh - COM3 non PS/2 UART (Reserved by IBM) ===== | ===== 3E8h-3EFh - COM3 non PS/2 UART (Reserved by IBM) ===== | ||
Ligne 308: | Ligne 313: | ||
(see [[# | (see [[# | ||
===== 3F0h-3F7h - Floppy disk controller (except PCjr) ===== | ===== 3F0h-3F7h - Floppy disk controller (except PCjr) ===== | ||
- | | 3F0h | Diskette controller status A | | + | {{tablelayout? |
- | | 3F1h | Diskette controller status B | | + | | 3F0h | Diskette controller status A | |
- | | 3F2h | controller control port | + | | 3F1h | Diskette controller status B | |
- | | 3F4h | controller status register | + | | 3F2h | controller control port |
- | | 3F5h | data register (write 1-9 byte command, see <A HREF="int_13.html"> | + | | 3F4h | controller status register |
- | | 3F6h | Diskette controller data | | + | | 3F5h | data register (write 1-9 byte command, see [[back2root: |
- | | 3F7h | Diskette digital input | | + | | 3F6h | Diskette controller data | |
+ | | 3F7h | Diskette digital input | | ||
===== 3F8h-3FFh - COM1 Primary Asynchronous Adapter ===== | ===== 3F8h-3FFh - COM1 Primary Asynchronous Adapter ===== | ||
{{anchor: | {{anchor: | ||
- | | 3220h-3227h | + | {{tablelayout? |
- | | 3228h-322Fh | + | | 3220h-3227h |
- | | 4220h-4227h | + | | 3228h-322Fh |
- | | 4228h-422Fh | + | | 4220h-4227h |
- | | 5220h-5227h | + | | 4228h-422Fh |
- | | 5228h-522Fh | + | | 5220h-5227h |
+ | | 5228h-522Fh |