Ci-dessous, les différences entre deux révisions de la page.
Les deux révisions précédentesRévision précédenteProchaine révision | Révision précédente | ||
back2root:ibm-pc-ms-dos:hardware:start [2023/01/05 04:15] – créée - modification externe 127.0.0.1 | back2root:ibm-pc-ms-dos:hardware:start [2024/08/27 12:04] (Version actuelle) – [Tableau] frater | ||
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Ligne 10: | Ligne 10: | ||
===== Quick Jump ===== | ===== Quick Jump ===== | ||
- | <nspages -h1 -simpleList -exclude: | + | <nspages -h1 -simpleList |
[[back2root: | [[back2root: | ||
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===== 020h-02Fh - 8259A Master Programmable Interrupt Controller ===== | ===== 020h-02Fh - 8259A Master Programmable Interrupt Controller ===== | ||
- | + | {{tablelayout? | |
- | | 020h | 8259 Command port (see [[back2root: | + | | 020h | [[back2root: |
- | | 021h | 8259 Interrupt mask register (see [[back2root: | + | | 021h | [[back2root: |
===== 030-03F | ===== 030-03F | ||
- | ===== 040-05F - 8253 or 8254 Programmable Interval Timer (PIT, see ~8253~) ===== | + | ===== 040-05F - 8253 or 8254 Programmable Interval Timer (PIT) ===== |
- | | 040h | 8253 |channel 0, counter divisor | + | | 040h | |
- | | 041h | 8253 |channel 1, RAM refresh counter | + | | 041h | |
- | | 042h | 8253 |channel 2, Cassette and speaker functions | + | | 042h | |
- | | 043h | 8253 |mode control | + | | 043h | |
- | | 044h | 8254 |PS/2 extended timer (see [[back2root: | + | | 044h | |
- | | 047h | 8254 |Channel 3 control byte | | + | | 047h | |
- | ===== 060h-067h - 8255 Programmable Peripheral Interface | + | ===== 060h-067h - 8255 Programmable Peripheral Interface |
- | | 060h | 8255 | Port A keyboard input/ | + | | 060h | |
- | | 061h | 8255 | Port B output | + | | 061h | |
- | | 062h | 8255 | Port C input | | + | | 062h | |
- | | 063h | 8255 | Command/ | + | | 063h | |
===== 060h-06Fh - 8042 Keyboard Controller | ===== 060h-06Fh - 8042 Keyboard Controller | ||
- | + | {{tablelayout? | |
- | | 060h | [[back2root: | + | | 060h | [[back2root: |
- | | 061h | [[back2root: | + | | 061h | [[back2root: |
- | | 064h | [[back2root: | + | | 064h | [[back2root: |
===== 070h-07Fh - CMOS RAM ===== | ===== 070h-07Fh - CMOS RAM ===== | ||
- | | 070h | CMOS RAM/RTC, also NMI enable/ | + | | 070h | CMOS RAM/RTC, also NMI enable/ |
| 071h | CMOS RAM data (AT, | | 071h | CMOS RAM data (AT, | ||
Ligne 85: | Ligne 85: | ||
===== 0A0h-0BFh - Second 8259 Programmable Interrupt Controller (AT, PS/2) ===== | ===== 0A0h-0BFh - Second 8259 Programmable Interrupt Controller (AT, PS/2) ===== | ||
- | | 0A0h | NMI Mask Register (PC,XT) (write 80h to enable NMI, 00h disable) | + | {{tablelayout? |
- | | 0A0h | Second 8259 Command port (see [[back2root: | + | | 0A0h |
- | | 0A1h | Second 8259 Interrupt mask register (see [[back2root: | + | | 0A0h | [[back2root: |
+ | | 0A1h | [[back2root: | ||
Ligne 141: | Ligne 142: | ||
===== 210h-217h | ===== 210h-217h | ||
- | | 210h | | + | {{tablelayout? |
- | | 211h | | + | | 210h |
- | | 212h | | + | | 211h |
- | | 213h | | + | | 212h |
+ | | 213h | ||
| 214h-215h | | 214h-215h | ||
- | | 214h | write | latch data | | + | | 214h |
- | | 214h | read | data | | + | | 214h |
- | | 215h | read | MSB of address,\\ next read: LSB of address | + | | 215h |
- | | : | | + | | : | |
- | | 21Fh | | Reserved | + | | 21Fh |
===== 220-26F | ===== 220-26F | ||
Ligne 170: | Ligne 172: | ||
===== 2E2h-2E3h - Data acquisition adapter (AT) ===== | ===== 2E2h-2E3h - Data acquisition adapter (AT) ===== | ||
- | ===== 2E8h-2EFh - COM4 non PS/2 UART (Reserved by IBM) (see ~UART~) ===== | + | ===== 2E8h-2EFh - COM4 non PS/2 UART (Reserved by IBM) ===== |
+ | |||
+ | see [[# | ||
+ | |||
===== 2F0h-2F7h - Reserved ===== | ===== 2F0h-2F7h - Reserved ===== | ||
- | ===== 2F8h-2FFh - COM2 Second Asynchronous Adapter | + | ===== 2F8h-2FFh - COM2 Second Asynchronous Adapter ===== |
Primary Asynchronous Adapter for PCjr | Primary Asynchronous Adapter for PCjr | ||
+ | See [[# | ||
===== 300h-31Fh - Prototype Experimentation Card (except PCjr) ===== | ===== 300h-31Fh - Prototype Experimentation Card (except PCjr) ===== | ||
Periscope hardware debugger | Periscope hardware debugger | ||
Ligne 209: | Ligne 217: | ||
===== 380h-38Fh - Secondary Binary Synchronous Data Link Control (SDLC) adapter ===== | ===== 380h-38Fh - Secondary Binary Synchronous Data Link Control (SDLC) adapter ===== | ||
- | | 380h | On board 8255 | port A, internal/ | + | | 380h | On board [[back2root: |
- | | 381h | On board 8255 | port B, external modem interface | + | | 381h | On board [[back2root: |
- | | 382h | On board 8255 | port C, internal control and gating | + | | 382h | On board [[back2root: |
- | | 383h | On board 8255 | mode register | + | | 383h | On board [[back2root: |
- | | 384h | On board 8253 | channel square wave generator | + | | 384h | On board [[back2root: |
- | | 385h | On board 8253 | channel 1 inactivity time-out | + | | 385h | On board [[back2root: |
- | | 386h | On board 8253 | channel 2 inactivity time-out | + | | 386h | On board [[back2root: |
- | | 387h | On board 8253 | mode register | + | | 387h | On board [[back2root: |
+ | |||
| 388h | On board 8273 | read: status\\ Write: Command | | 388h | On board 8273 | read: status\\ Write: Command | ||
| 389h | On board 8273 | write: parameter\\ read: response | | 389h | On board 8273 | write: parameter\\ read: response | ||
Ligne 226: | Ligne 236: | ||
===== 3A0h-3AFh - Primary Binary Synchronous Data Link Control (SDLC) adapter ===== | ===== 3A0h-3AFh - Primary Binary Synchronous Data Link Control (SDLC) adapter ===== | ||
- | | 3A0h | On board 8255 | port A, internal/ | + | {{tablelayout? |
- | | 3A1h | On board 8255 | port B, external modem interface | + | | 3A0h | On board [[back2root: |
- | | 3A2h | On board 8255 | port C, internal control and gating | + | | 3A1h | On board [[back2root: |
- | | 3A3h | On board 8255 | mode register | + | | 3A2h | On board [[back2root: |
- | | 3A4h | On board 8253 | counter 0 unused | + | | 3A3h | On board [[back2root: |
- | | 3A5h | On board 8253 | counter 1 inactivity time-outs | + | | 3A4h | On board [[back2root: |
- | | 3A6h | On board 8253 | counter 2 inactivity time-outs | + | | 3A5h | On board [[back2root: |
- | | 3A7h | On board 8253 | mode register | + | | 3A6h | On board [[back2root: |
- | | 3A8h | On board 8251 | data | | + | | 3A7h | On board [[back2root: |
- | | 3A9h | On board 8251 | command/ | + | |
+ | | 3A8h | On board 8251 | data | | ||
+ | | 3A9h | On board 8251 | command/ | ||
- | ===== 3B0h-3BFh - Monochrome Display Adapter (write only, see ~6845~) ===== | + | ===== 3B0h-3BFh - Monochrome Display Adapter (write only) ===== |
- | | 3B0h | port address decodes to 3B4 | | + | {{tablelayout? |
- | | 3B1h | port address decodes to 3B5 | | + | | 3B0h |
- | | 3B2h | port address decodes to 3B4 | | + | | 3B1h |
- | | 3B3h | port address decodes to 3B5 | | + | | 3B2h |
- | | 3B4h | 6845 index register, selects which register [0-11h] is to be accessed through port 3B5 | + | | 3B3h |
- | | 3B5h | 6845 data register [0-11h] selected by port 3B4, registers 0C-0F may be read. If a read occurs without the adapter installed, FFh is returned. | + | | 3B4h | [[back2root: |
- | | 3B6h | port address decodes to 3B4 | | + | | 3B5h | [[back2root: |
- | | 3B7h | port address decodes to 3B5 | | + | | 3B6h |
- | | 3B8h | 6845 Mode control register | + | | 3B7h |
- | | 3B9h | reserved for color select register on color adapter | + | | 3B8h | [[back2root: |
- | | 3BAh | status register (read only) | | + | | 3B9h |
- | | 3BBh | reserved for light pen strobe reset | | + | | 3BAh |
+ | | 3BBh | ||
===== 3BCh-3BFh - Primary Parallel Printer Adapter (see ~PARALLEL PORT~) ===== | ===== 3BCh-3BFh - Primary Parallel Printer Adapter (see ~PARALLEL PORT~) ===== | ||
Ligne 272: | Ligne 285: | ||
| 3CEh | VGA graphics index | | | 3CEh | VGA graphics index | | ||
| 3CFh | Other VGA graphics | | 3CFh | Other VGA graphics | ||
+ | |||
+ | see [[ega-vga-registers|EGA/ | ||
===== 3D0h-3DFh - Color Graphics Monitor Adapter ===== | ===== 3D0h-3DFh - Color Graphics Monitor Adapter ===== | ||
<WRAP round info > | <WRAP round info > | ||
- | ports 3D0h-3DBh are write only, see 6845 | + | ports 3D0h-3DBh are write only, see [[back2root: |
</ | </ | ||
- | | 3D0h | port address decodes to 3D4 | + | | 3D0h | [[back2root: |
- | | 3D1h | port address decodes to 3D5 | + | | 3D1h | [[back2root: |
- | | 3D2h | port address decodes to 3D4 | + | | 3D2h | [[back2root: |
- | | 3D3h | port address decodes to 3D5 | + | | 3D3h | [[back2root: |
- | | 3D4h | 6845 index register, selects which register [0-11h] is to be accessed through port 3D5 | | + | | 3D4h | [[back2root: |
- | | 3D5h | 6845 data register [0-11h] selected by port 3D4, registers 0C-0F may be read. If a read occurs without the adapter installed, FFh is returned. | + | | 3D5h | [[back2root: |
- | | 3D6h | port address decodes to 3D4 | + | | 3D6h | [[back2root: |
- | | 3D7h | port address decodes to 3D5 | + | | 3D7h | [[back2root: |
- | | 3D8h | 6845 Mode control register (CGA, EGA, VGA, except PCjr) | + | | 3D8h | [[back2root: |
- | | 3D9h | color select palette register (CGA, EGA, VGA, see [[back2root: | + | | 3D9h | [[back2root: |
- | | 3DAh | status register (read only, see [[back2root: | + | | 3DAh | [[back2root: |
- | | 3DBh | Clear light pen latch (any write) | + | | 3DBh | [[back2root: |
- | | 3DCh | Preset Light pen latch | | + | | 3DCh | [[back2root: |
- | | 3DFh | CRT/CPU page register (PCjr only) | + | | 3DFh | [[back2root: |
- | ===== 3E8h-3EFh - COM3 non PS/2 UART (Reserved by IBM) (see ~UART~) ===== | + | ===== 3E8h-3EFh - COM3 non PS/2 UART (Reserved by IBM) ===== |
+ | (see [[# | ||
===== 3F0h-3F7h - Floppy disk controller (except PCjr) ===== | ===== 3F0h-3F7h - Floppy disk controller (except PCjr) ===== | ||
- | | 3F0h | Diskette controller status A | | + | {{tablelayout? |
- | | 3F1h | Diskette controller status B | | + | | 3F0h | Diskette controller status A | |
- | | 3F2h | controller control port | + | | 3F1h | Diskette controller status B | |
- | | 3F4h | controller status register | + | | 3F2h | controller control port |
- | | 3F5h | data register (write 1-9 byte command, see <A HREF="int_13.html"> | + | | 3F4h | controller status register |
- | | 3F6h | Diskette controller data | | + | | 3F5h | data register (write 1-9 byte command, see [[back2root: |
- | | 3F7h | Diskette digital input | | + | | 3F6h | Diskette controller data | |
- | + | | 3F7h | Diskette digital input | | |
- | ===== 3F8h-3FFh - COM1 Primary Asynchronous Adapter | + | |
- | | 3220h-3227h | + | ===== 3F8h-3FFh - COM1 Primary Asynchronous Adapter ===== |
- | | 3228h-322Fh | + | {{anchor: |
- | | 4220h-4227h | + | {{tablelayout? |
- | | 4228h-422Fh | + | | 3220h-3227h |
- | | 5220h-5227h | + | | 3228h-322Fh |
- | | 5228h-522Fh | + | | 4220h-4227h |
+ | | 4228h-422Fh | ||
+ | | 5220h-5227h | ||
+ | | 5228h-522Fh |