back2root:ibm-pc-ms-dos:hardware:8259

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back2root:ibm-pc-ms-dos:hardware:8259 [2022/12/29 02:56] – [Tableau] fraterback2root:ibm-pc-ms-dos:hardware:8259 [2022/12/29 13:03] – [Initialization Command Word 1 at Port 20h and A0h] frater
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 +~~TOC 1-4 ~~
 +
 ====== 8259 - Programmable Interrupt Controller (PIC) ====== ====== 8259 - Programmable Interrupt Controller (PIC) ======
  
 ==== Initialization Command Word 1 at Port 20h and A0h ==== ==== Initialization Command Word 1 at Port 20h and A0h ====
-<code> +^  Bit  ^ Initiali                                           ^ 
-|7|6|5|4|3|2|1|0|  ICW1 +|  0    | 0=no ICW4 needed\\ 1=ICW4 is needed                | 
- | | | | | | | `---- 1=ICW4 is needed, 0=no ICW4 needed +|  1    | 0=cascading 8259's\\ 1=single 8259                 | 
- | | | | | | `----- 1=single 8259, 0=cascading 8259's +|  2    | 0=8 byte int vectors\\ 1=4 byte interrupt vectors  | 
- | | | | | `------ 1=4 byte interrupt vectors, 0=8 byte int vectors +|  3    | 0=edge triggered mode\\ 1=level triggered mode     | 
- | | | | `------- 1=level triggered mode, 0=edge triggered mode +|  4    | must be 1 for ICW1 (port must also be 20h or A0h)  | 
- | | | `-------- must be 1 for ICW1 (port must also be 20h or A0h) +|  5-7  | must be zero for PC systems                        |
- `------------- must be zero for PC systems +
-</code> +
 ==== Initialization Command Word 2 at Port 21h and A1h ==== ==== Initialization Command Word 2 at Port 21h and A1h ====
  
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  `-------------- unused (set to zero)  `-------------- unused (set to zero)
 </code> </code>
 +
 +
  
 ^  Bits       |^ Buffering Mode                  ^ ^  Bits       |^ Buffering Mode                  ^
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 ==== Other Registers ==== ==== Other Registers ====
  
-IRR - Interrupt Request Register, maintains a bit vector indicating which IRQ hardware events are awaiting service. Highest level interrupt is reset when the CPU acknowledges interrupt. +  * IRR - Interrupt Request Register, maintains a bit vector indicating which IRQ hardware events are awaiting service. Highest level interrupt is reset when the CPU acknowledges interrupt. 
-ISR - In Service Register, tracks IRQ line currently being serviced.  +  * ISR - In Service Register, tracks IRQ line currently being serviced. \\ Updated by EOI command.
-<tab>Updated by EOI command.+
  
-===== Hardware Interrupt Sequence of Events: ======+====== Hardware Interrupt Sequence of Events: ======
  
   - 8259 <A HREF="int_table.html">IRQ</A> signal is raised high by hardware setting the corresponding IRR bits true.   - 8259 <A HREF="int_table.html">IRQ</A> signal is raised high by hardware setting the corresponding IRR bits true.
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   - for a more in-depth discussion of the 8259, see Intel's "Micro-processor and Peripherals Handbook, Volume I"   - for a more in-depth discussion of the 8259, see Intel's "Micro-processor and Peripherals Handbook, Volume I"
  
-  - see  <A HREF="ports.html">PORTS</A>  and  <A HREF="int_table.html">INT TABLE</A> +<WRAP rounded box> 
 +see [[back2root:ibm-pc-ms-dos:hardware-ports|PORTS]] and <A HREF="int_table.html">INT TABLE</A> 
 +</WRAP>
  • back2root/ibm-pc-ms-dos/hardware/8259.txt
  • Dernière modification : 2023/01/16 16:33
  • de frater