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8255 - Programmable Peripheral Interface - PPI (PC,XT, PCjr)
The Intel 8255 (or i8255) Programmable Peripheral Interface (PPI) chip was developed and manufactured by Intel in the first half of the 1970s for the Intel 8080 microprocessor. The 8255 provides 24 parallel input/output lines with a variety of programmable operating modes.
The 8255 is a member of the MCS-85 family of chips, designed by Intel for use with their 8085 and 8086 microprocessors and their descendants. It was first available in a 40-pin DIP and later a 44-pin PLCC packages. It found wide applicability in digital processing systems and was later cloned by other manufacturers. The 82C55 is a CMOS version for higher speed and lower current consumption.
The functionality of the 8255 is now mostly embedded in larger VLSI processing chips as a sub-function. A CMOS version of the 8255 is still being made[3] by Renesas but mostly used to expand the I/O of microcontrollers.
Pin-out
| PA0 - PA7 | Pins of port A |
|---|---|
| PB0 - PB7 | Pins of port B |
| PC0 - PC7 | Pins of port C |
| D0 - D7 | Data pins for the transfer of data |
| RESET | Reset input |
| RD | Read input (inverted) |
| WR | Write input (inverted) |
| CS | Chip select (inverted) |
| A0 - A1 | Address pins |
| NOT CS | A1 | A0 | Selection | Address |
|---|---|---|---|---|
| 0 | 0 | 0 | PORT A | 80 H |
| 0 | 0 | 1 | PORT B | 81 H |
| 0 | 1 | 0 | PORT C | 82 H |
| 0 | 1 | 1 | Control Register | 83 H |
| 1 | X | X | No Seletion | X |
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