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Ci-dessous, les différences entre deux révisions de la page.

--- back2root:ibm-pc-ms-dos:hardware:8255 [2023/01/13 09:05] – créée frater
+++ back2root:ibm-pc-ms-dos:hardware:8255 [2024/08/27 14:49] (Version actuelle) – [Pin-out] frater
@@ Ligne 1: / Ligne 1: @@
-====== 8255 Programmable Peripheral Interface (PC,XT, PCjr) ======
+====== 8255 - Programmable Peripheral Interface - PPI (PC,XT, PCjr) ======
+<WRAP group>
+<WRAP column 300px>
+{{ :back2root:ibm-pc-ms-dos:hardware:ic-photo-intel--d8255.jpg?direct&200 }}
+{{ :back2root:ibm-pc-ms-dos:hardware:8255-logic.png?direct&200 }}
+</WRAP>
+<WRAP column *>
+The Intel 8255 (or i8255) Programmable Peripheral Interface (PPI) chip was developed and manufactured by Intel in the first half of the 1970s for the Intel 8080 microprocessor.
+The 8255 provides 24 parallel input/output lines with a variety of programmable operating modes.
+The 8255 is a member of the MCS-85 family of chips, designed by Intel for use with their 8085 and 8086 microprocessors and their descendants.
+It was first available in a 40-pin DIP and later a 44-pin PLCC packages.
+It found wide applicability in digital processing systems and was later cloned by other manufacturers.
+The 82C55 is a CMOS version for higher speed and lower current consumption.
+The functionality of the 8255 is now mostly embedded in larger VLSI processing chips as a sub-function.
+A CMOS version of the 8255 is still being made by Renesas but mostly used to expand the I/O of microcontrollers, the 82C55 for higher speed and lower current consumption.
+This chip is present only on PC, PC-XT and PCJunior, for AT and later model (AT, PS/2), it was replaced by the [[back2root:ibm-pc-ms-dos:hardware:8042|8042 Keyboard Controller]]
+</WRAP>
+</WRAP>
+===== Pin-out =====
+<WRAP group>
+<WRAP  column 210px>
+{{:back2root:ibm-pc-ms-dos:hardware:8255.svg?direct&200 }}
+</WRAP>
+<WRAP half column>
+{{tablelayout?rowsHeaderSource=Auto}}
+^  PA0 - PA7  | Pins of port A                      |
+^  PB0 - PB7  | Pins of port B                      |
+^  PC0 - PC7  | Pins of port C                      |
+^  D0 - D7    | Data pins for the transfer of data  |
+^  RESET      | Reset input                         |
+^  RD         | Read input (inverted)               |
+^  WR         | Write input (inverted)              |
+^  CS         | Chip select (inverted)              |
+^  A0 - A1    | Address pins                        |
+</WRAP>
+</WRAP>
+It consists of 40 pins and operates in +5V regulated power supply.
+Port C is further divided into two 4-bit ports i.e. port C lower and port C upper and port C can work in either BSR (bit set rest) mode or in mode 0 of input-output mode of 8255.
+Port B can work in either mode 0 or in mode 1 of input-output mode.
+Port A can work either in mode 0, mode 1 or mode 2 of input-output mode.
+It has two control groups, control group A and control group B. Control group A consist of port A and port C upper.
+Control group B consists of port C lower and port B. Depending upon the value if CS’, A1 and A0 we can select different ports in different modes as input-output function or BSR.
+This is done by writing a suitable word in control register (control word D0-D7).
+===== PC / XT / Junior Mapping =====
+{{tablelayout?rowsHeaderSource=Auto}}
+^  A0  ^  A1  ^ Selection                                            ^ Address  ^
+|  0   |  0   | PORT A (keyboard input/output buffer (output PCjr))  | 060h     |
+|  0   |  1   | PORT B Output                                        | 061h     |
+|  1   |  0   | PORT C Input                                         | 062h     |
+|  1   |  1   | Control Register                                     | 063h     |

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