Différences

Ci-dessous, les différences entre deux révisions de la page.

--- back2root:ibm-pc-ms-dos:hardware:8250 [2023/01/06 23:09] – [Port 3FF/2FF - Scratch Pad Register (read/write)] frater
+++ back2root:ibm-pc-ms-dos:hardware:8250 [2023/02/23 20:55] (Version actuelle) – [UART - Universal Asynchronous Receiver/Transmitter] frater
@@ Ligne 1: / Ligne 1: @@
-====== UART - Universal Asynchronous Receiver/Transmitter ======
+====== 8250 - UART - Universal Asynchronous Receiver/Transmitter ======
 {{tablelayout?rowsHeaderSource=Auto}}
@@ Ligne 26: / Ligne 26: @@
 |  4-7  |reserved (zero)  |
+<WRAP round box>
-- 16550 will interrupt if data exists in the FIFO and isn't read within the time it takes to receive four bytes or if no data is received within the time it takes to receive four bytes.
+  * 16550 will interrupt if data exists in the FIFO and isn't read within the time it takes to receive four bytes or if no data is received within the time it takes to receive four bytes.
+</WRAP>
 ===== Baud Rate Divisor Table =====
 {{tablelayout?rowsHeaderSource=Auto}}
@@ Ligne 178: / Ligne 179: @@
 Programming considerations:
+<WRAP round box>
   * 8250's, 16450's are essentially identical to program
   * 16550's is pin and software compatible with the 16450 but has an internal FIFO queue that may be enabled/disabled by software
   * PCs are capable of 38.4Kb, while AT's are capable of 115.2Kb
   * receiver checks only the first stop bit of each character regardless of the number of stop bits specified
   * Older 8250 and 16450 UARTs may lose THRE interrupt if the THRE and Receive Data (RD) or the Line Status (LS) interrupts occur simultaneously during a full duplex transmission.  RD and LS have higher priority than THRE which causes the lower priority interrupt to be lost.  The following are 3 methods used to avoid this problem:
     - Disable/re-enable THRE interrupt via the IER after processing Receive Data & Line Status interrupts.
     - While inside the RD and LS interrupt routines check the LSR THRE bit and set a flag that a THRE interrupt was waiting.
@@ Ligne 190: / Ligne 191: @@
   * data loss can occur without overrun or framing errors if the interrupts are serviced too slowly
   * reserved bits are usually set to zero.  Code should NOT rely on this being the case since future enhancement may use these bits
-  * see  INT TABLE  or  IRQ  for interrupt assignments
+</WRAP>
-  * see  PORTS   for COMx port assignment (3F8,2F8,3E8,2E8,3220...)
+  * see [[back2root:ibm-pc-ms-dos:hardware:informations:irq|INT TABLE]] or [[back2root:ibm-pc-ms-dos:hardware:IRQ|IRQ]] for interrupt assignments
+  * see [[back2root:ibm-pc-ms-dos:hardware:start|PORTS]] for COMx port assignment (3F8,2F8,3E8,2E8,3220...)

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